The invention relates to a method and apparatus for evaluating electrostatic discharge (ESD) conditions in a particular environment, and particularly to encapsulating electrostatic discharge sensors in packages which are exposed to that environment and then testing the encapsulated sensors to evaluate the ESD environment.
It is well known that electrostatic discharge occurs in many industrial processes, such as in manufacturing processes, assembly processes, electronic testing process and the like. For example, in manufacture of semiconductor devices, electrostatic charge builds up and is discharged during various human or machine workpiece handling operations wherein semiconductor wafers are processed and tested, and wherein individual chips are packaged and further probed, tested, etc. The amount of electrostatic charge accumulated and discharged during handling of workpieces is sufficient to cause a significant number of component failures, reducing the yield of various manufacturing/testing/handling operations and substantially increasing the overall product cost.
Furthermore, low level electrostatic discharge sources in assembly processes, semiconductor manufacture processes, electronic testing processes etc. are particularly important to detect, since such low level electrostatic discharge sources can cause latent damage in a manufactured product, reducing the reliability thereof.
In the past it has been very difficult to reduce workpiece damage caused by electrostatic discharge. Most prior electronic equipment for measurement of electrostatic discharge is very expensive. Use of floating gate field effect transistors has been proposed for measurement of electrostatic discharge events that often occur in manufacture, processing, testing, packaging, and shipping of semiconductor devices. The articles "Novel Test Structure for the Measurement of Electrostatic Discharge Pulses" by Lendenmann, Schrimpf and Bridges, published both in the proceedings of the IEEE 1990 International Conference on Microelectronic Test Structures, Volume 3, March 1990 and the IEEE Transactions on Semiconductor Manufacturing, Volume 4, No. 3, August 1991 disclose results of experiments showing that the shift of floating gate field effect transistor characteristics following exposure to an electrostatic discharge event can be used to measure electrostatic discharge pulse magnitude. However, use of floating gate field effect transistors as electrostatic discharge detectors has the disadvantages of high costs, the need for a specially designed and laid out chip, and a complex processing sequence.
Thus, there is an unmet need for a technique and equipment for accurately and economically evaluating various environments to characterize the extent of electrostatic discharge events therein, including relatively low level (eg, less than 200 volts) electrostatic discharge events.